DocumentCode
2881275
Title
A 17ns 64K CMOS RAM with a schmitt trigger sense amplifier
Author
Ochii, K. ; Yasuda, Hozumi ; Kobayashi, Kaoru ; Kondoh, T. ; Masuoka, Fujio
Author_Institution
Toshiba Corp., Kawasaki, Japan
Volume
XXVIII
fYear
1985
fDate
13-15 Feb. 1985
Firstpage
64
Lastpage
65
Abstract
This paper will describe a CMOS SRAM using a four-transistor cross-coupled flip-flop memory cell with a high resistivity load composed of the second poly-Si. Cell is 12.5μm
m. Die is 3.86mm×6.99mm that can De packaged in a 300 mil wide 22 pin plastic DIP.
m. Die is 3.86mm×6.99mm that can De packaged in a 300 mil wide 22 pin plastic DIP.Keywords
Aluminum; Decoding; Delay lines; Electronics packaging; Fluctuations; Impurities; Manufacturing; Power dissipation; Random access memory; Trigger circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1985 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1985.1156745
Filename
1156745
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