• DocumentCode
    2881322
  • Title

    An IEEE standard floating point chip

  • Author

    Komal, A. ; Goskel, K. ; Diodato, P. ; Fields, J. ; Gumaste, U. ; Chaw Kung ; Kingyao Lin ; Lega, M. ; Maurer, Patrick ; Thomas Ng ; Yaw Oh ; Thierbach, M.

  • Author_Institution
    AT&T Bell Laboratories, Holmdel, NJ, USA
  • Volume
    XXVIII
  • fYear
    1985
  • fDate
    13-15 Feb. 1985
  • Firstpage
    18
  • Lastpage
    19
  • Abstract
    This paper will report on a 14MHz IEEE standard floating point coprocessor for a 32b microprocessor. Implemented in 1.75μ twin-tub CMOS, the chip supports single, double and extended double precision floating point, as well as 32b integer and 18 digit BCD operations.
  • Keywords
    Arithmetic; CMOS technology; Central Processing Unit; Circuits; Coprocessors; Programmable logic arrays; Protocols; Registers; Switches; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1985 IEEE International
  • Conference_Location
    New York, NY, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1985.1156748
  • Filename
    1156748
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2881322