DocumentCode
2881782
Title
A 1Mb CMOS DRAM with fast page and static column modes
Author
Saito, Sakuyoshi ; Fujii, Shohei ; Okada, Yoshitaka ; Sawada, Syo ; Shinozaki, S. ; Natori, K. ; Ozawa, O.
Author_Institution
Toshiba Semiconductor Device Engineering Lab, Kawasaki, Japan
Volume
XXVIII
fYear
1985
fDate
13-15 Feb. 1985
Firstpage
252
Lastpage
253
Keywords
CMOS process; Capacitors; Coupling circuits; Laboratories; Leakage current; Pulse circuits; Random access memory; Read-write memory; Semiconductor devices; Variable structure systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1985 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1985.1156776
Filename
1156776
Link To Document