• DocumentCode
    288192
  • Title

    The route from VHDL to FPGA using synthesis

  • Author

    Hossack, C.J. ; Guy, C.G.

  • Author_Institution
    Dept. of Eng., Reading Univ., UK
  • fYear
    1994
  • fDate
    34437
  • Firstpage
    42583
  • Lastpage
    42586
  • Abstract
    VHDL started to be standardized by the American government in February 1986 as a hardware description language for specifying military systems. Since then it has undergone two major revisions by the IEEE. This paper describes the use of VHDL in the design of a transputer Global Link Adapter (GLA) and the route taken to produce a final Xilinx FPGA using Viewlogic
  • Keywords
    field programmable gate arrays; hardware description languages; high level synthesis; transputers; FPGA; VHDL; Viewlogic; Xilinx; hardware description language; transputer global link adapter;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Software Support and CAD Techniques for FPGAs, IEE Colloquium on
  • Conference_Location
    London
  • Type

    conf

  • Filename
    369834