Title :
Low temperature CMOS 8 × 8b multipliers with sub 10ns speeds
Author :
Hanamura, S. ; Aoki, Masaki ; Masuhara, T. ; Minato, O. ; Sakai, Yoshiki ; Hayashida, T.
Author_Institution :
Hitachi Ltd., Tokyo, Japan
Abstract :
Low temperature CMOS (CRYO-CMOS) has been found to be especially suitable for VLSI based systems since it offers high density and low power dissipation. This paper will report on the performance of CRYO-CMOS 8×8b multipliers with 8ns multiplication time, and 5mW and 460mW power dissipation, respectively.
Keywords :
CMOS technology; Circuits; Delay; Gallium arsenide; Helium; Inverters; Nitrogen; Power dissipation; Temperature; Very large scale integration;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1985 IEEE International
Conference_Location :
New York, NY, USA
DOI :
10.1109/ISSCC.1985.1156789
