DocumentCode :
288220
Title :
A reconfigurable ASIC front end
Author :
Yick, P. ; White, N.M. ; Brignell, J.E.
Author_Institution :
Dept. of Electron. & Comput. Sci., Southampton Univ., UK
fYear :
1994
fDate :
34389
Firstpage :
42430
Lastpage :
42433
Abstract :
This paper describes the work carried out on developing a reconfigurable ASIC front end for an intelligent sensor system. It is part of a joint industrial and academic research programme in ASICs for smart sensors involving the University of Southampton, Lucas Advanced Engineering Centre and European Silicon Structures (ES2). A test chip has been produced which facilitates the investigation of various aspects of system reconfiguration under digital control. In order to maximise the capability for experimentation, there is a high pin count so that interconnections and resistors can be added externally. The device is realised as standard CMOS library subsystems within the ES2 process. Ten-bit analogue-to-digital conversion (ADC) and digital-to-analogue (DAC) conversion are included
Keywords :
CMOS integrated circuits; intelligent sensors; mixed analogue-digital integrated circuits; ES2 process; European Silicon Structures; analogue-to-digital conversion; digital-to-analogue conversion; intelligent sensor system; pin count; reconfigurable ASIC front end; smart sensors; standard CMOS library subsystems; system reconfiguration;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Application Specific Integrated Circuits for Measurement Systems, IEE Colloquium on
Conference_Location :
London
Type :
conf
Filename :
369873
Link To Document :
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