DocumentCode
2882359
Title
An 8MHz 8b CMOS subranging ADC
Author
Dingwall, A. ; Zazzu, V.
Author_Institution
RCA Laboratories, Princeton, NJ, USA
Volume
XXVIII
fYear
1985
fDate
13-15 Feb. 1985
Firstpage
72
Lastpage
73
Abstract
An 8b subranging ADC realized in a 3μ silicon gate double poly CMOS process will be described. The ADC uses 31 comparators and is capable of conversion rates to 8MHz. Die size is 126×85 mils.
Keywords
CMOS logic circuits; Clocks; Costs; Laboratories; Linearity; Power dissipation; Resistors; Solid state circuits; Throughput; Video signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1985 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1985.1156806
Filename
1156806
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