Title :
Using Handel to accelerate systems development
Author :
Page, Ian ; Randall, Geoff
Author_Institution :
Comput. Lab., Oxford Univ., UK
Abstract :
The Handel compiler, based on an Occam subset, is intended to exploit the expressive power of contemporary software engineering technology to rapidly generate high confidence net-list descriptions. These, once placed and routed, make efficient use of the target hardware (currently Xilinx FPGAs). This process is illustrated
Keywords :
Occam; circuit layout CAD; field programmable gate arrays; logic CAD; network routing; Handel compiler; Occam subset; Xilinx FPGAs; net-list descriptions; placement; routing; software engineering technology; target hardware;
Conference_Titel :
Fast Prototyping of IC Designs, IEE Colloquium on
Conference_Location :
London
