DocumentCode :
288238
Title :
Logic simulation for rapid prototyping: necessary or inhibiting?
Author :
Kerö, Nikolaus ; Sauter, Thilo
Author_Institution :
Inst. for General Electr. Eng. & Electron., Wien Univ., Austria
fYear :
1994
fDate :
34487
Firstpage :
42430
Lastpage :
42434
Abstract :
In the course of numerous projects where we utilised User Programmable Logic Devices (UPLD) as a very feasible solution for building hardware system prototypes, we were often forced to decide how much simulation effort is acceptable to stay within time. In this survey we will show by means of several examples that both reliable logic and system simulation are-although sometimes quite time consuming-indispensable prerequisites for fast and efficient prototyping. Especially when dealing with complex UPLDs regardless of specific families, the turn around time of the placement and routing procedure exceeds several hours even if executed on high performance workstations
Keywords :
application specific integrated circuits; circuit layout CAD; logic CAD; logic partitioning; network routing; programmable logic devices; UPLDs; hardware system prototypes; high performance workstations; logic simulation; placement; rapid prototyping; routing procedure; turn around time; user programmable logic devices;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Fast Prototyping of IC Designs, IEE Colloquium on
Conference_Location :
London
Type :
conf
Filename :
369898
Link To Document :
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