Author :
Maio ; Hayashi, Shin´ichiro ; Hotta, Masao ; Yokozawa, N. ; Watanabe, Toshio ; Ueda, Shuichi
Author_Institution :
Hitachi Central Research Laboratory, Tokyo, Japan
Abstract :
A DAC with a 500MHz conversion rate, 2ns settling time, 0.6ns rise/fall times and 200ps/V glitch energy will be reported. The DAC has been fabricated in shallow groove VLSI technology.
Keywords :
Clamps; Decoding; Driver circuits; Frequency; Isolation technology; Parasitic capacitance; Switches; Velocity measurement; Very large scale integration; Voltage;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1985 IEEE International
Conference_Location :
New York, NY, USA
DOI :
10.1109/ISSCC.1985.1156809
