DocumentCode
2882510
Title
A 1.2GHz single-chip NMOS PLL
Author
Yamada, Tomoaki ; Wada, Sho ; Ito, Satoshi ; Suga, Yuji
Author_Institution
Sony Corp., Atsugi, Japan
Volume
XXVIII
fYear
1985
fDate
13-15 Feb. 1985
Firstpage
24
Lastpage
25
Abstract
The use of 1.8μ double LOCOS NMOS technology with an on-chip supply voltage converter for 1.2GHz single chip PLL will be reported. Basic application of the design is for digital tuning systems of TV receivers.
Keywords
Circuits; Electrodes; Indium tin oxide; Ion implantation; MOS devices; Oscillators; Phase locked loops; Radiofrequency amplifiers; Threshold voltage; Tuning;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1985 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1985.1156815
Filename
1156815
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