Title :
CMOS class-AB voltage-mode multiplier
Author :
Boonchu, Boonchai ; Surakampontorn, Wanlop
Author_Institution :
Fac. of Eng., King Mongkut´´s Inst. of Technol., Bangkok, Thailand
Abstract :
A novel circuit configuration for a CMOS voltage-mode four-quadrant analog multiplier is described. It is based on square law characteristic of MOS transistor and class-AB amplifier. The multiplier achieves a linearity of 1.1%, -3 dB bandwidth of 35 MHz, and a total harmonic distortion of 0.76%. The power consumption is 1.5 mW.
Keywords :
CMOS analogue integrated circuits; analogue multipliers; harmonic distortion; 1.5 mW; 35 MHz; CMOS; MOS transistor; circuit configuration; class-AB amplifier; class-AB voltage-mode analog multiplier; power consumption; total harmonic distortion; Bandwidth; CMOS analog integrated circuits; CMOS technology; Equations; Linearity; MOS devices; MOSFETs; Threshold voltage; Transconductance; Variable structure systems;
Conference_Titel :
Communications and Information Technology, 2005. ISCIT 2005. IEEE International Symposium on
Print_ISBN :
0-7803-9538-7
DOI :
10.1109/ISCIT.2005.1567165
