• DocumentCode
    2882615
  • Title

    An 8Kb content-addressable and reentrant memory

  • Author

    Kodata, H. ; Miyake, Jun ; Nishimichi, Y. ; Kudo, Hiroyuki ; Kagawa, Keiichiro

  • Author_Institution
    Matsushita Electric Industrial Co., Ltd., Osaka, Japan
  • Volume
    XXVIII
  • fYear
    1985
  • fDate
    13-15 Feb. 1985
  • Firstpage
    42
  • Lastpage
    43
  • Abstract
    A 30\\mu \\times 36\\mu memory cell implemented in 2μ CMOS affording a 100ns cycle time will be described.
  • Keywords
    Associative memory; Circuits; Clocks; Data mining; Delay; Dynamic programming; Functional programming; Programmable logic arrays; Random access memory; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1985 IEEE International
  • Conference_Location
    New York, NY, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1985.1156820
  • Filename
    1156820
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2882615