Title :
An NMOS digital signal processor with multiprocessing capability
Author :
Magar, S. ; Essig, D. ; Caudel, E. ; Marshall, Simon ; Peters, R. ; Kneib, K.
Author_Institution :
Texas Instruments, Inc., Houston, TX, USA
Abstract :
This paper will describe a second generation 8-13MIP multi-tasking DSP with a 544×16b RAM and single cycle multiply/accumulation instructions. The chip is implemented with 2.4μ NMOS technology.
Keywords :
Arithmetic; Computer architecture; Concurrent computing; Digital signal processing; Digital signal processors; Hardware; MOS devices; Random access memory; Read-write memory; Registers;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1985 IEEE International
Conference_Location :
New York, NY, USA
DOI :
10.1109/ISSCC.1985.1156830
