Title :
A 3.6ns ECL programmable array logic IC
Author :
Millhollan, M. ; Chiakang Sung
Author_Institution :
National Semiconductor Corp., Santa Clara, CA, USA
Abstract :
An ECL FPAL with a total delay of 3.6ns at 1.0W will be reported. The chip has 64 product terms with 16 inputs and 8 outputs.
Keywords :
Capacitance; Cutoff frequency; Electronics packaging; Fuses; Logic arrays; Logic circuits; Logic programming; Programmable logic arrays; Propagation delay; Voltage;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1985 IEEE International
Conference_Location :
New York, NY, USA
DOI :
10.1109/ISSCC.1985.1156833
