DocumentCode
2883126
Title
The effect of scaling upto future analog/digital systems
Author
McCreary, J.
Author_Institution
Micro Linear Corp., San Jose, CA, USA
Volume
XXVIII
fYear
1985
fDate
13-15 Feb. 1985
Firstpage
112
Lastpage
113
Abstract
As demonstrated over the last decade, the performance of both logic and linear CMOS circuits improve as the technology is scaled. Because of this scaling, increasingty larger integrated analog/digital systems have become possible. Such systems include precision amplification and buffering, as well as microprocessor circuits, logic and memory. This panel will examine the practical issues and future architectural consequences involved in the continued scaling of these systems. The issues include the need for on-chip power regulation, digital versus linear filtering and data conversion and the trend towards digital calibration of linear circuits. In addition, circuit design innovation in analog has been another factor resulting in a moving boundary between analog versus digital performance. On the other hand, the consequences of testing analog rather than digital circuits must also be considered... Panelists will debate the advantages of both digital and linear circuit approaches in future analog/digital systems.
Keywords
CMOS logic circuits; CMOS memory circuits; CMOS technology; Circuit testing; Digital systems; Integrated circuit technology; Linear circuits; Logic circuits; Maximum likelihood detection; Microprocessors;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1985 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1985.1156850
Filename
1156850
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