Analysis of voltage balancing limits in modular multilevel converters

The modular multilevel converter (MMC) is one of the most promising converter topologies for high-voltage applications, especially for high-voltage direct-current (HVDC) transmission systems. One of the most challenging issues associated with the MMC is the capacitor voltage variations, which if not properly controlled, result in large circulating currents flowing through the converter legs. This paper develops a mathematical model to formulate and analyze capacitor voltage variations and the circulating currents within the MMC legs. Based on the developed model, the limits to the capacitor voltage balancing task are derived and graphically presented. A set of simulation results conducted in MATLAB/Simulink environment are presented to verify the accuracy of the mathematical analysis.