Title :
SPICE compact modeling of PD-SOI CMOS devices
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
This paper presents PD-SOI SPICE, which is based on compact BiCMOS charge-control models and includes second-order effects, electron and lattice temperatures, for circuit simulation of low-voltage CMOS circuits using deep-submicron partially-depleted (PD) SOI CMOS devices. This PD-SOI SPICE performs transient simulation of the write-access critical path in an SRAM composed of 42 PD SOI CMOS devices without convergence problems, which are commonly encountered while modeling PD devices due to kink effects
Keywords :
BiCMOS integrated circuits; CMOS integrated circuits; SPICE; semiconductor device models; silicon-on-insulator; PD-SOI CMOS devices; SPICE compact modeling; SRAM; circuit simulation; compact BiCMOS charge-control models; electron temperature; kink effects; lattice temperature; low-voltage CMOS circuits; second-order effects; write-access critical path; BiCMOS integrated circuits; CMOS technology; Circuit simulation; Electron mobility; Lattices; MOS devices; SPICE; Semiconductor device modeling; Temperature; Very large scale integration;
Conference_Titel :
Electron Devices Meeting, 2000. Proceedings. 2000 IEEE Hong Kong
Conference_Location :
Hong Kong
Print_ISBN :
0-7803-6304-3
DOI :
10.1109/HKEDM.2000.904203
