DocumentCode :
2884011
Title :
A dual-port 65ns 64K × 4 DRAM with a 50MHz serial output
Author :
Whiteside, F. ; Mozden, T. ; Sittig, R.
Author_Institution :
Mostek Corp., Carrollton, TX, USA
Volume :
XXIX
fYear :
1986
fDate :
19-21 Feb. 1986
Firstpage :
48
Lastpage :
49
Abstract :
A DRAM featuring 256×4 serial output at 50MHz and row / column redundancy will be described. Using a cell-plate driver the entire matrix amy be written in 256 flash-write cycles.
Keywords :
Capacitors; Laser modes; MOS devices; Noise figure; Noise measurement; Random access memory; Redundancy; Registers; Signal restoration; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1986 IEEE International
Conference_Location :
Anaheim, CA, USA
Type :
conf
DOI :
10.1109/ISSCC.1986.1156899
Filename :
1156899
Link To Document :
بازگشت