Title :
A vector dataflow architecture
Author_Institution :
Dept. of Telecommun. & Comput. Syst., R. Inst. of Technol., Stockholm, Sweden
Abstract :
The author presents a vector data-flow (VDF) architecture which is based on the following design philosophy: increasing data granularity, whenever possible, by grouping together ordered sequences of data into logical structures called vectors; increasing node granularity by grouping together nodes, according to a partitioning algorithm, to form logical structures called tasks; and supporting efficient execution of both vector and task structures by designing a dedicated hardware level. The VDF processor based on this scheme is described, and simulation results are presented
Keywords :
parallel architectures; data granularity; dedicated hardware level; logical structures; node granularity; ordered sequences; partitioning algorithm; simulation; tasks; vector dataflow architecture; vectors; Computer architecture; Concurrent computing; Context modeling; Costs; Hardware; Joining processes; Parallel processing; Partitioning algorithms; Pipelines; Telecommunication computing;
Conference_Titel :
Databases, Parallel Architectures and Their Applications,. PARBASE-90, International Conference on
Conference_Location :
Miami Beach, FL
Print_ISBN :
0-8186-2035-8
DOI :
10.1109/PARBSE.1990.77195
