Title :
A CMOS electrically reprogrammable ASIC with multi-level random logic capabilities
Author :
Goetting, E. ; Revak, S. ; Jan, Zohaib
Author_Institution :
Exel Microelectronics, Incorporated, San Jose, CA, USA
Abstract :
A 24-pin electrically-reprogrammable ASIC, implemented in CMOS EEPROM technology with two-layer polysilicon and two-layer metal, providing user logic complexity of 600-800 gate equivalents, will be described. Speeds of 15ns per internal logic level have been obtained with 50mW consumption.
Keywords :
Application specific integrated circuits; CMOS logic circuits; CMOS technology; EPROM; Flip-flops; Logic arrays; Logic circuits; Logic devices; Logic programming; Metallization;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1986 IEEE International
Conference_Location :
Anaheim, CA, USA
DOI :
10.1109/ISSCC.1986.1156901
