Title :
A 20MHz 32b pipelined CMOS image processor
Author :
Kanuma, A. ; Noda, Masaki ; Nihira, H. ; Yaguchi, Toshiyuki ; Ikumi, N. ; Hori, Chiori ; Sugai, Mitsunobu ; Suzuki, Kenji
Author_Institution :
Toshiba Semiconductor Device Engineering Laboratory, Kawasaki, Japan
Abstract :
A 32b image processor with writable control stores that can process a 1024-point complex FFT in 1ms, has been developed. This paper will report on features which include fabrication in 1.2μm N-well CMOS, use of double layer metal technology and the integration of 170K transistors. Dissipation is 750mw at 5V.
Keywords :
Biomedical engineering; CMOS process; Circuit testing; Clocks; Electronics packaging; Pipelines; Read-write memory; Registers; Semiconductor devices; Signal processing;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1986 IEEE International
Conference_Location :
Anaheim, CA, USA
DOI :
10.1109/ISSCC.1986.1156909
