DocumentCode :
2884236
Title :
Using cache mapping to improve memory performance handheld devices
Author :
Xu, Rong ; Li, Zhiyuan
Author_Institution :
Dept. of Comput. Sci., Purdue Univ., West Lafayette, IN, USA
fYear :
2004
fDate :
2004
Firstpage :
106
Lastpage :
114
Abstract :
Processors such as the Intel StrongARM SA-1110 and the Intel XScale provide flexible control over the cache management to achieve better cache utilization. Programs can specify the cache mapping policy for each virtual page, i.e. mapping it to the main cache, the mini-cache, or neither. For the latter case, the page is marked as non-cacheable. In this paper, we use memory profiling to guide such page-based cache mapping. We model the cache mapping problem and prove that finding the optimal cache mapping is NP-hard. We then present a heuristic to select the mapping. Execution time measurement shows that our heuristics can improve the performance from 1% to 21% for a set of test programs. As a byproduct of performance enhancement, we also save the energy by 4% to 28%.
Keywords :
cache storage; computational complexity; memory architecture; notebook computers; performance evaluation; NP-hard problem; cache bypass; cache management; cache mapping policy; cache mapping problem; cache utilization; flexible control; handheld devices; memory performance improvement; memory profiling; mini-cache; multiple cache; optimal cache mapping; page-based cache mapping; performance enhancement; Clocks; Costs; Data structures; Embedded system; Handheld computers; Hardware; Monitoring; Probes; Program processors; Time measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Performance Analysis of Systems and Software, 2004 IEEE International Symposium on - ISPASS
Print_ISBN :
0-7803-8385-0
Type :
conf
DOI :
10.1109/ISPASS.2004.1291362
Filename :
1291362
Link To Document :
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