DocumentCode :
2884820
Title :
A 1Mb CMOS DRAM with design-for-test functions
Author :
Neal, J. ; Holland, Benjamin ; Inoue, Shingo ; Wah Loh ; McAdams, H. ; Ken Poteet
Author_Institution :
Texas Instruments Incorporated, Houston, TX, USA
Volume :
XXIX
fYear :
1986
fDate :
19-21 Feb. 1986
Firstpage :
264
Lastpage :
265
Abstract :
A mask programmable 1Mb CMOS DRAM family has been developed featuring design-for-test functions which allow the memory to reconfigured as an 8b parallel 128Kb organization to reduce test time. With a 1μm twin-well CMOS technology and a contactless trench cell, the chip measures 49mm2.
Keywords :
CMOS technology; Circuits; Decoding; Design for testability; Fuses; Parasitic capacitance; Plastic packaging; Random access memory; Signal restoration; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1986 IEEE International
Conference_Location :
Anaheim, CA, USA
Type :
conf
DOI :
10.1109/ISSCC.1986.1156947
Filename :
1156947
Link To Document :
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