DocumentCode
2884823
Title
Novel silicon epitaxy for advanced MOSFET devices
Author
Neudeck, G.W. ; Tai-Chi Su ; Denton, J.P.
Author_Institution
Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
fYear
2000
fDate
10-13 Dec. 2000
Firstpage
169
Lastpage
172
Abstract
Silicon selective epitaxial growth (SEG) and epitaxial lateral overgrowth provide a technology for fabricating thin SOI device islands, fully self-aligned double gate SOI MOSFETs and multiple layers of SOI devices. Sub-micron P-MOSFETs in 2 SOI layers of SOI islands and the double-gate fully-depleted devices show low off currents <0.2 pA//spl mu/m with low values of sub-threshold slopes (<70 mV/dec).
Keywords
MOSFET; elemental semiconductors; semiconductor epitaxial layers; semiconductor growth; silicon; silicon-on-insulator; vapour phase epitaxial growth; MOSFET devices; Si; epitaxial lateral overgrowth; fully self-aligned double gate devices; multiple layers; off currents; selective epitaxial growth; sub-threshold slopes; thin SOI device islands; Atomic layer deposition; CMOS integrated circuits; CMOS process; Epitaxial growth; Etching; Insulation; Lifting equipment; MOSFET circuits; Research and development; Silicon on insulator technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2000. IEDM '00. Technical Digest. International
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-7803-6438-4
Type
conf
DOI
10.1109/IEDM.2000.904285
Filename
904285
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