• DocumentCode
    2885409
  • Title

    Hybrid silicon wafer-scale packaging technology

  • Author

    Johnson, R. ; Davidson, J. ; Jaeger, Richard C. ; Kerns, D.

  • Author_Institution
    Auburn University, Auburn, AL, USA
  • Volume
    XXIX
  • fYear
    1986
  • fDate
    19-21 Feb. 1986
  • Firstpage
    166
  • Lastpage
    167
  • Abstract
    Procedures developed for mounting ICs in holes in a silicon wafer and inter-connecting them, via two-level metalization, will be presented. The performance of the interconnections at high speeds will be compared with traditional hybrid assemblies.
  • Keywords
    Aluminum; Anisotropic magnetoresistance; Etching; High speed optical techniques; Integrated circuit interconnections; Optical interconnections; Packaging; Silicon; Wafer bonding; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1986 IEEE International
  • Conference_Location
    Anaheim, CA, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1986.1156981
  • Filename
    1156981
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2885409