Title :
Large scale analog neural computer with programmable architecture and programmable time constants for temporal pattern analysis
Author :
Van der Spiegel, Jan ; Donham, Christopher ; Etienne-Cummings, Ralph ; Fernando, Sanath ; Mueller, Paul ; Blackman, David
Author_Institution :
Dept. of Electr. Eng., Pennsylvania Univ., Philadelphia, PA, USA
fDate :
27 Jun-2 Jul 1994
Abstract :
A large scale analog neural network has been built and tested for a number of applications. The network contains 1024 neurons with 94 synaptic inputs per neuron. The network is able to receive upto 3072 analog inputs. Among its unique features are the programmability of the architecture and the neural components allowing it to be used as a research and development tool for a large variety of applications. Also the network incorporates programmable time constants which makes it well suited for doing real-time or compressed time computations of temporal patterns. The operation of the neural network is fully analog and parallel, and runs independently of the digital host. The neural elements are custom designed and fabricated in a 1.5 μm CMOS technology. They are grouped into three kind of chips: neuron chip, synapse chip, and the time constant and switch matrix chip. These chips or modules are placed on 16 printed circuit boards each containing 48 chips. Up to 3,072 buffered analog inputs and outputs are available
Keywords :
CMOS analogue integrated circuits; analogue computers; analogue processing circuits; motion estimation; neural chips; neural net architecture; parallel architectures; pattern classification; speech recognition; CMOS technology; large scale analog neural computer; modules; neuron chip; neuron transfer characteristic; parallel architecture; programmable architecture; programmable time constants; stepwise linear function; switch matrix chip; synapse chip; temporal pattern analysis; Analog computers; Application software; CMOS technology; Computer architecture; Large-scale systems; Neural networks; Neurons; Research and development; Switches; Testing;
Conference_Titel :
Neural Networks, 1994. IEEE World Congress on Computational Intelligence., 1994 IEEE International Conference on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-1901-X
DOI :
10.1109/ICNN.1994.374436