DocumentCode :
2885588
Title :
A 100Mb/s CMOS video D/A converter with shift register and color map
Author :
Kuang Chi ; Geisenhainer, C. ; Riley, M. ; Rose, R. ; Sturges, P. ; Sullivan, B. ; Watson, R. ; Woodside, R.
Author_Institution :
Digital Equipment Corp., Hudson, MA, USA
Volume :
XXIX
fYear :
1986
fDate :
19-21 Feb. 1986
Firstpage :
134
Lastpage :
135
Abstract :
A triple 4b video D/A converter with on-chip video shift registers, palette memory and cursor logic, built in 2μm CMOS will be covered. The chip drives 75Ω cables directly at a pixel rate of 106MHz. Full-scale settling time is 4ns.
Keywords :
Clocks; Color; Delay; Logic testing; Master-slave; Pipelines; Shift registers; Signal processing; Streaming media; Synchronization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1986 IEEE International
Conference_Location :
Anaheim, CA, USA
Type :
conf
DOI :
10.1109/ISSCC.1986.1156990
Filename :
1156990
Link To Document :
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