Title :
Neural network hardware performance criteria
Author :
Van Keulen, Edwin ; Colak, Sel ; Withagen, Heini ; Hegt, Hans
Author_Institution :
Eindhoven Univ. of Technol., Netherlands
fDate :
27 Jun-2 Jul 1994
Abstract :
Nowadays, many real world problems need fast processing neural networks to come up with a solution in real time. Therefore hardware implementation becomes indispensable. The problem is then to choose the right chip that is to be used for a particular application. For this, a proper set of hardware performance criteria is needed to be able to compare the performance of neural network chips. The most important criterium is related to the speed a network processes information with a given accuracy. For this a new criterium is proposed. The `effective number of connection bits´ represents the effective accuracy of a chip. The `(effective) connection primitives per second´ criterium now provides a new speed criterium normalized to the amount of information value that is processed in a connection. In addition to this the authors also propose another new criterium called `reconfigurability number´ as a measure for the reconfigurability and size of a chip. Using these criteria gives a much more neutral view of the performance of a neural network chip than the existing conventional criteria, such as `connections per second´
Keywords :
neural chips; performance evaluation; connection primitives per second; effective accuracy; effective number of connection bits; neural network chips; neural network hardware performance criteria; reconfigurability number; Computer architecture; Computer networks; Embedded system; Fabrication; Fault tolerance; Integrated circuit manufacture; Integrated circuit technology; Multi-layer neural network; Neural network hardware; Neural networks;
Conference_Titel :
Neural Networks, 1994. IEEE World Congress on Computational Intelligence., 1994 IEEE International Conference on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-1901-X
DOI :
10.1109/ICNN.1994.374446