DocumentCode
2885798
Title
A micro-programmable realtime image processor
Author
Mori, Takayoshi ; Aono, K. ; Sakai, Hiroki ; Hasegawa, Kiyotomo ; Yamada, Hiroyoshi ; Takemoto, T.
Author_Institution
Matsushita Electric Industrial Co., Ltd., Osaka, Japan
Volume
XXIX
fYear
1986
fDate
19-21 Feb. 1986
Firstpage
144
Lastpage
145
Abstract
A micro-programmable realtime image processor with an instruction cycle of 20ns will be described. A 7×7mm2, 45K transistor chip has been designed in a self-aligned bipolar technology. Dissipation is 2.5W.
Keywords
Arithmetic; Counting circuits; Image edge detection; Image processing; Pixel; Read only memory; Shift registers; Signal processing; Textile industry; Toy industry;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1986 IEEE International
Conference_Location
Anaheim, CA, USA
Type
conf
DOI
10.1109/ISSCC.1986.1157003
Filename
1157003
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