DocumentCode :
2886156
Title :
Investigation of a model for the segregation and pile-up of boron at the SiO/sub 2//Si interface during the formation of ultrashallow p/sup +/ junctions
Author :
Shima, A. ; Jinbo, T. ; Ushio, J. ; Oh, J.-H. ; Ono, K. ; Oshima, M. ; Natsuaki, N.
Author_Institution :
Device Dev. Center, Hitachi Ltd., Tokyo, Japan
fYear :
2000
fDate :
10-13 Dec. 2000
Firstpage :
519
Lastpage :
522
Abstract :
We have quantitatively investigated how boron segregates to regions dose to the surface, and what controls this phenomenon, using XPS and Backside SIMS measurement techniques. We found that, on the contrary to the equilibrium segregation, the pileup of boron are mainly on and within 0.6 nm of the Si side of the interface, and that there is no difference between the kind of encapsulation. This also suggests that the pileup of boron is mainly on the Si side, and implies that the main factor in this segregation is the existence of the Si surface. From the viewpoint of device fabrication, this result seems to be useful in terms of the fabrication of side-walls. The possibility for boron pileup to occur in the interstitial state was also shown.
Keywords :
X-ray photoelectron spectra; boron; doping profiles; elemental semiconductors; interstitials; secondary ion mass spectra; segregation; semiconductor-insulator boundaries; silicon; silicon compounds; SiO/sub 2/-Si:B; SiO/sub 2//Si interface; XPS; backside SIMS; boron pile-up; boron segregation; encapsulation; interstitial; sidewall fabrication; ultrashallow p/sup +/ junction; Atomic measurements; Boron; Chemistry; Distortion measurement; Encapsulation; Fabrication; Laboratories; Measurement techniques; Rough surfaces; Surface roughness;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2000. IEDM '00. Technical Digest. International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-6438-4
Type :
conf
DOI :
10.1109/IEDM.2000.904369
Filename :
904369
Link To Document :
بازگشت