Title :
A hardware efficient implementation of a boxes reinforcement learning system
Author :
Hu, Yendo ; Fellman, Ronald D.
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., San Diego, La Jolla, CA, USA
fDate :
27 Jun-2 Jul 1994
Abstract :
This paper presents two modifications to the Boxes-ASE/ACE reinforcement learning algorithm to improve implementation efficiency and performance. A state history queue (SHQ) replaces the decay computations associated with each control state, decoupling the dependence of computational demand from the number of control states. A dynamic link table implements CMAC state association to decrease training time, yet minimize the number of control states. Simulations of the link table demonstrated its potential for minimizing control states for unoptimized state-space quantization. Simulations coupling the link table to CMAC state association show a 3-fold reduction in learning time. A hardware implementation of the pole-cart balancer shows the SHQ modification to reduce computation time 12-fold
Keywords :
cerebellar model arithmetic computers; learning (artificial intelligence); state-space methods; Boxes-ASE/ACE reinforcement learning algorithm; CMAC state association; computational demand; control states minimization; decay computations; decoupling; dynamic link table; hardware efficient implementation; pole-cart balancer; state history queue; training time decrease; unoptimized state-space quantization; Adaptive control; Algorithm design and analysis; Computational modeling; Control systems; Decoding; Equations; Hardware; Learning; Programmable control; Quantization;
Conference_Titel :
Neural Networks, 1994. IEEE World Congress on Computational Intelligence., 1994 IEEE International Conference on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-1901-X
DOI :
10.1109/ICNN.1994.374577