Title :
On planarity of W-graph
Author_Institution :
Fac. of Integrated Arts & Sci., Hiroshima Univ., Japan
Abstract :
A W-graph is a graph containing wild components and is very useful for layout design of PCB or LSI/VLSI. A wild component is a connected subgraph containing p vertices 3⩽p<∞ and p-1 edges whose locations are unspecified. This paper gives a definition of a planar W-graph and shows some sufficient conditions for testing whether a W-graph is planar or not. Finally, the difficulty for testing the planarity of a W-graph is discussed
Keywords :
circuit layout; graph theory; large scale integration; network topology; printed circuit design; LSI/VLSI; PCB; W-graph; connected subgraph; layout design; planarity; testing; wild component; Art; Electronic circuits; Joining processes; Large scale integration; Pins; Sufficient conditions; Testing; Transmission line matrix methods; Very large scale integration; Wires;
Conference_Titel :
Circuits and Systems, 1991. Conference Proceedings, China., 1991 International Conference on
Conference_Location :
Shenzhen
DOI :
10.1109/CICCAS.1991.184454
