Title :
A novel low noise design method for CMOS L-degeneration cascoded LNA
Author :
Lee, Sung-Huang ; Ying-Zong Juang ; Chiu, Chin-Fong ; Chiou, Hwann-Kaeo
Author_Institution :
Dept. of Chip Implementation Service, Nat. Chip Implementation Center
Abstract :
The noise optimization design of the CMOS LNA is important in a communication IC. The conventional noise optimization method for L-degeneration cascoded LNA with noise mainly from active device loses the validity as the operating frequency increasing. In this paper, we present a noise optimization with gain matching design method for LNA with fully considerations of noise sources including the induced gate noise and the loss of gate inductor. The gate inductor is an important issue when its quality factor is less than 20
Keywords :
CMOS analogue integrated circuits; amplifiers; circuit optimisation; integrated circuit design; integrated circuit noise; CMOS L-degeneration cascoded LNA; active device; communication IC; gain matching design; gate inductor; induced gate noise; low noise amplifier; low noise design; noise optimization; Active noise reduction; CMOS technology; Design methodology; Design optimization; Frequency; Impedance; Inductors; Integrated circuit noise; Noise figure; Q factor;
Conference_Titel :
Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on
Conference_Location :
Tainan
Print_ISBN :
0-7803-8660-4
DOI :
10.1109/APCCAS.2004.1412747
