DocumentCode
2887137
Title
A 400MSPS 8b flash AD conversion LSI
Author
Akazawa, Yuya ; Iwata, A. ; Wakimoto, Takaaki ; Kamato, T. ; Nakamura, Hajime ; Ikawa, H.
Author_Institution
NTT Electrical Communications, Electronics Technology Corp., Kanagawa, Japan
Volume
XXX
fYear
1987
fDate
0-0 Feb. 1987
Firstpage
98
Lastpage
99
Abstract
This report will disclose a 18GHz fT bipolar technology which has been used to design a 400MSPS A-D converter with a 2.7W power consumption. The SNR is 40dB and a 100MHz input frequency results in a 10ps sampling jitter.
Keywords
Binary codes; Bipolar integrated circuits; Delay; Electronics packaging; Impedance; Large scale integration; Logic; Power dissipation; Sampling methods; Solid state circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1987.1157082
Filename
1157082
Link To Document