Title :
Implementation complexity of bit permutation instructions
Author :
Shi, Zhijie Jerry ; Lee, Ruby B.
Author_Institution :
Dept. of Electr. Eng., Princeton Univ., NJ, USA
Abstract :
Several bit permutation instructions, including GRP, OMFLIP, CROSS, and BFLY, have been proposed recently for efficiently performing arbitrary bit permutations. Previous work has shown that these instructions can accelerate a variety of applications such as block ciphers and sorting algorithms. In this paper, we compare the implementation complexity of these instructions in terms of delay. We use logical effort, a process technology independent method, to estimate the delay of the bit permutation functional units. Our results show that for 64-bit operations, the BFLY instruction is the fastest among these bit permutation instructions; the OMFLIP instruction is next; and the GRP instruction is the slowest.
Keywords :
logic circuits; logic design; bit permutation instructions; block ciphers; sorting algorithms; Acceleration; CMOS logic circuits; Cryptography; Delay estimation; Logic functions; Logic gates; Microprocessors; Parasitic capacitance; Pulse inverters; Sorting;
Conference_Titel :
Signals, Systems and Computers, 2004. Conference Record of the Thirty-Seventh Asilomar Conference on
Print_ISBN :
0-7803-8104-1
DOI :
10.1109/ACSSC.2003.1292038