A unified model for integrated resistors in CMOS technologies

In the present work we present a compact model, oriented to the SPICE-like simulation, that pictures the electrical behavior of integrated resistors fabricated in CMOS technologies. The model accounts for the main electrical features of integrated resistors such as the depletion effects, the head resistance contribution, the velocity saturation and the temperature behavior also including possible self-heating phenomena. It has been validated by considering a wide fan of integrated resistors: n-and p-type, diffused, poly silicon devices. It could be a precious tool for design in analog application, where a very accurate description of the electrical behavior is needed.