DocumentCode
2887545
Title
Impact of gate-induced drain leakage current on the tail distribution of DRAM data retention time
Author
Saino, K. ; Horiba, S. ; Uchiyama, S. ; Takaishi, Y. ; Takenaka, M. ; Uchida, T. ; Takada, Y. ; Koyama, K. ; Miyake, H. ; Hu, C.
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fYear
2000
fDate
10-13 Dec. 2000
Firstpage
837
Lastpage
840
Abstract
In this paper we propose a new model for leakage mechanism in tail-mode bits of DRAM data retention characteristics. For main-mode bits, leakage current can be attributed to junction thermal-generation leakage current. For tail-mode bits, it is found for the first time that Gate-Induced Drain Leakage (GIDL) current has a dominant impact. The root cause is electric field enhancement caused by metal precipitates located at the gate-drain overlap region.
Keywords
DRAM chips; leakage currents; precipitation; DRAM; data retention time; electric field; gate-induced drain leakage current; metal precipitates; tail distribution; tail-mode bits; Capacitors; Current measurement; Dielectric substrates; Leakage current; National electric code; Probability distribution; Random access memory; Testing; Vehicles; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2000. IEDM '00. Technical Digest. International
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-7803-6438-4
Type
conf
DOI
10.1109/IEDM.2000.904447
Filename
904447
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