DocumentCode :
2887610
Title :
A 60ns 4Mb CMOS DRAM with built-in self-test
Author :
Ohsawa, T. ; Furuyama, T. ; Watanabe, Y. ; Tanaka, H. ; Kushiyama, N. ; Tsuchida, K. ; Nagahama, Y. ; Yamano, S. ; Tanaka, T. ; Shinozaki, S. ; Natori, K.
Author_Institution :
Toshiba Microengineering Corp., Kawasaki, Japan
Volume :
XXX
fYear :
1987
fDate :
0-0 Feb. 1987
Firstpage :
286
Lastpage :
287
Keywords :
Automatic testing; Built-in self-test; CMOS technology; Capacitance; Circuit testing; Computer errors; Counting circuits; Microcomputers; Random access memory; Read-write memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1987.1157105
Filename :
1157105
Link To Document :
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