DocumentCode
2887691
Title
An 8Kbyte intelligent cache memory
Author
Watanabe, T.
Author_Institution
NEC IC Microcomputer Systems, Kanagawa, Japan
Volume
XXX
fYear
1987
fDate
0-0 Feb. 1987
Firstpage
266
Lastpage
267
Keywords
Cache memory; Circuit testing; Clocks; Memory management; Microprocessors; Monitoring; National electric code; Random access memory; Read-write memory; System buses;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1987.1157109
Filename
1157109
Link To Document