DocumentCode
2887789
Title
An 8b 350MHz flash ADC
Author
Yoshii, Y. ; Nakamura, M. ; Hirasawa, K. ; Kayanuma, A. ; Asano, K.
Author_Institution
Sony Semiconductor Group, Kanagawa, Japan
Volume
XXX
fYear
1987
fDate
0-0 Feb. 1987
Firstpage
96
Lastpage
97
Abstract
A circuit technology and a self-aligned emitter process with poly-Si base contact, affording 350MHz conversion with power consumption of 1.5W, will be reported. A flash A/D conversion technique with error and nonlinearity suppression provides a 41.5dB SNR for a 30MHz input signal. The chip measures 3.16×82mm, with 14,000 components.
Keywords
Assembly; Bandwidth; Capacitance; Carbon capture and storage; Ceramics; Frequency; Linearity; Sampling methods; Yagi-Uda antennas;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1987.1157115
Filename
1157115
Link To Document