DocumentCode :
2887893
Title :
An 8b 50MHz video ADC with folding and interpolation techniques
Author :
van de Grift, R. ; van der Veen, M.
Author_Institution :
Philips Research Laboratories, Eindhoven, Netherlands
Volume :
XXX
fYear :
1987
fDate :
0-0 Feb. 1987
Firstpage :
94
Lastpage :
95
Abstract :
Signal-to-noise ratio and harmonic distortion better than 48dB and -45dB, respectively, over the full 5MHz video bandwidth for an 8b ADC, will be reported. A parallel-stage-folding and interpolation technique has resulted in die size of 2.3×2.4mm2and power consumption of less than 300mW.
Keywords :
Bandwidth; Circuits; Distortion; Frequency conversion; Frequency measurement; High definition video; Interpolation; Latches; Signal resolution; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1987.1157120
Filename :
1157120
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2887893
بازگشت