DocumentCode
2888108
Title
A programmable signal processor for array applications
Author
Schlereth, F. ; Irwin, James ; Wild, N. ; French, Mark
Author_Institution
Syracuse University, Syracuse, NY, USA
Volume
XXX
fYear
1987
fDate
0-0 Feb. 1987
Firstpage
160
Lastpage
161
Abstract
A general purpose DSP circuit performing pre-programmed functions such as a 256 point FFT in 500μs in under 400μs will be described. Systolic arrays of the device can perform a 1024-point FFT in 500μs. A 155K transistor chip has been fabricated in 1.25μm CMOS on a die area of 66.9mm2, and operates at 12MHz.
Keywords
Array signal processing; Circuits; Clocks; Finite impulse response filter; Random access memory; Read only memory; Read-write memory; Signal processing; Signal processing algorithms; Synchronization;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1987.1157133
Filename
1157133
Link To Document