DocumentCode :
2888269
Title :
An experimental 35ns 1Mb biCMOS DRAM
Author :
Hori, R. ; Kitsukawa, G. ; Kawajiri, Y. ; Watanabe, Toshio ; Kawahara, Toshio ; Itoh, Kenji ; Kobayashi, Yoshiyuki ; Oohayashi, M. ; Asayama, K. ; Ikeda, Takashi ; Kawamoto, Hiroaki
Author_Institution :
Hitachi Central Research Laboratory, Tokyo, Japan
Volume :
XXX
fYear :
1987
fDate :
0-0 Feb. 1987
Firstpage :
280
Lastpage :
281
Keywords :
BiCMOS integrated circuits; Bipolar transistors; Clocks; Driver circuits; Error analysis; Mirrors; Power dissipation; Random access memory; Voltage; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1987.1157141
Filename :
1157141
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2888269