DocumentCode
2888274
Title
A preliminary look at error avoidance in digital logic via feedback equalization
Author
Takhirov, Zafar ; Nazer, Bobak ; Joshi, Ajay
Author_Institution
Dept. of Electr. & Comput. Eng., Boston Univ., Boston, MA, USA
fYear
2011
fDate
28-30 Sept. 2011
Firstpage
1390
Lastpage
1391
Abstract
This note describes preliminary efforts to incorporate feedback into error avoidance schemes for combinatorial efforts. Taking a 4-bit Kogge-Stone adder as a case study, we develop a feedback equalization scheme that cuts down on errors without increasing energy consumption.
Keywords
adders; logic design; 4-bit Kogge-Stone adder; digital logic; energy consumption; error avoidance; feedback equalization scheme; Adders; Computer architecture; Integrated circuit reliability; Inverters; Reliability engineering; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Communication, Control, and Computing (Allerton), 2011 49th Annual Allerton Conference on
Conference_Location
Monticello, IL
Print_ISBN
978-1-4577-1817-5
Type
conf
DOI
10.1109/Allerton.2011.6120329
Filename
6120329
Link To Document