DocumentCode :
2888450
Title :
A new approach for multilevel logic cell optimization
Author :
Poechmueller, P. ; Glesner, M.
Author_Institution :
Tech. Univ., Inst. for Microelectron Syst., Darmstadt, Germany
fYear :
1991
fDate :
4-8 Jan 1991
Firstpage :
94
Lastpage :
99
Abstract :
Presents new ideas in the field of multi-level logic optimization for automatic logic macrocell synthesis. A new approach is proposed which performs a quasi-parallel optimization of very different and complex tasks via a simulated annealing based expert system. A first working prototype software package for multilevel logic cell optimization had been implemented to prove the validity of this approach. The system performs a real architecture exploration, finding the best solution with respect to a certain cost-function which takes into account actual design parameters like speed, area, power, and not only indirect parameters like number of literals etc. Another feature is the small and primitive set of required rules
Keywords :
expert systems; logic CAD; many-valued logics; simulated annealing; software packages; area; automatic logic macrocell synthesis; design parameters; expert system; multilevel logic cell optimization; power; quasi-parallel optimization; real architecture exploration; required rules; simulated annealing; software package; speed; Automatic logic units; Boolean functions; Circuit synthesis; Energy consumption; Expert systems; Logic circuits; Macrocell networks; Microelectronics; Minimization methods; Simulated annealing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1991. Proceedings., Fourth CSI/IEEE International Symposium on
Conference_Location :
New Delhi
Print_ISBN :
0-8186-2125-7
Type :
conf
DOI :
10.1109/ISVD.1991.185099
Filename :
185099
Link To Document :
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