DocumentCode :
2888568
Title :
A VLSI 128-channel data link control
Author :
Chao, Paul ; Cyr, G. ; Hiller, Tobias ; King, R. ; Wilson, Richard
Author_Institution :
AT&T Bell Laboratories, Naperville, IL, USA
Volume :
XXX
fYear :
1987
fDate :
0-0 Feb. 1987
Firstpage :
82
Lastpage :
83
Abstract :
A controller with a 160K transistor automatically extracted from a behavorial description and fabricated in 1μm CMOS will be described. The chip is 367×390 mils, attaining a device density of 0.9mil2per transistor and dissipates 600mW at a clock rate of 8MHz.
Keywords :
Built-in self-test; Chaos; Circuit simulation; Circuit synthesis; Cyclic redundancy check; ISDN; Integrated circuit modeling; Microprocessors; Transmitters; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1987.1157156
Filename :
1157156
Link To Document :
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