DocumentCode :
2888660
Title :
Educating future chip designers
Author :
Horowitz, Mark
Author_Institution :
Stanford University, Stanford, CA, USA
Volume :
XXX
fYear :
1987
fDate :
0-0 Feb. 1987
Firstpage :
244
Lastpage :
245
Abstract :
The evolution of analog and digital integrated circuits from small elements to complex systems is clearly documented in the past issues of the DIGEST. Improvements in technology and CAD, raise some vital questions about the areas that future chip designers need to understand and the venue for this training. The answers depend strongly on the techniques and tools available for the chip designer: whether CAD will provide powerful compilers, freeing the designer to focus on system issues, or whether the demands of performance tuning debugging and normal design will force the designer to understand circuits. To discuss these issues, panelists will review opinions on the relative importance of the spectrum from device physics to system architecture.
Keywords :
Chip scale packaging; Circuit synthesis; Design automation; Design engineering; Electronic components; Industrial training; Integrated circuit technology; Physics; Productivity; Silicon compiler;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1987.1157160
Filename :
1157160
Link To Document :
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