Title :
Neuro-fuzzy hybrid hardware implementation with neural chip URAN
Author_Institution :
Korea Telecom, Seoul, South Korea
fDate :
27 Jun- 2 Jul 1994
Abstract :
This paper describes a neuro-fuzzy hardware implementation with the circuit of analogue and digital mixed operation. The circuits are suggested for membership function, MIN function and normalization function using either linear voltage-controlled MOSFET resistance or pulse stream operation. The analogue-digital hybrid way of implementation is extensible to the fuzzy-neural network as its basic configurations are already used in URAN-I of 135424 synaptic connections
Keywords :
MOS integrated circuits; fuzzy logic; fuzzy neural nets; mixed analogue-digital integrated circuits; neural chips; neurocontrollers; MIN function; URAN-I; linear voltage-controlled MOSFET resistance; membership function; neural chip; neuro-fuzzy hybrid hardware; normalization function; pulse stream operation; Application software; Artificial neural networks; Fuzzy logic; Fuzzy neural networks; Fuzzy systems; Intrusion detection; MOSFET circuits; Neural network hardware; Pulse circuits; Voltage;
Conference_Titel :
Neural Networks, 1994. IEEE World Congress on Computational Intelligence., 1994 IEEE International Conference on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-1901-X
DOI :
10.1109/ICNN.1994.374848
