Title :
A 32b LISP processor
Author :
Watanabe, K. ; Ishikawa, Akira ; Yamada, Y. ; Hibino, Y.
Author_Institution :
NTT Electrical Communication Laboratories, Tokyo, Japan
Abstract :
A 80K transistor chip, implemented in 2μm CMOS, with a die size of 15×15mm, will be disclosed. A LISP computer assembled with this circuit operates 3X faster than comparable machines.
Keywords :
Circuit simulation; Costs; Design methodology; Functional programming; Indium tin oxide; Logic circuits; Logic design; Process design; Testing; Wiring;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location :
New York, NY, USA
DOI :
10.1109/ISSCC.1987.1157173
