DocumentCode
2888935
Title
A 32b LISP processor
Author
Watanabe, K. ; Ishikawa, Akira ; Yamada, Y. ; Hibino, Y.
Author_Institution
NTT Electrical Communication Laboratories, Tokyo, Japan
Volume
XXX
fYear
1987
fDate
0-0 Feb. 1987
Firstpage
200
Lastpage
201
Abstract
A 80K transistor chip, implemented in 2μm CMOS, with a die size of 15×15mm, will be disclosed. A LISP computer assembled with this circuit operates 3X faster than comparable machines.
Keywords
Circuit simulation; Costs; Design methodology; Functional programming; Indium tin oxide; Logic circuits; Logic design; Process design; Testing; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1987.1157173
Filename
1157173
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